Analog Devices Inc. ADAU1861 Low Power Codec

Analog Devices Inc. ADAU1861 Low Power Codec offers three inputs and one output that combines two digital-signal processors (DSPs). The route from the analog input to the DSP core to the analog output is optimized for low latency. The device provides up to 768kHz sample rate and 336kB total memory.

The ADI ADAU1861 is available in a 64-lead lead-frame chip scale package (LFCSP).

Features

  • Programmable FastDSP audio processing engine
    • Up to 768kHz sample rate
    • Biquad filters, limiters, volume controls, and mixing
  • Tensilica HiFi 3z DSP core
    • Quad MAC per cycle: 24 × 24-bit multiplier and 64-bit accumulator
    • Flexible power operation mode: 24.576MHz, 49.152MHz, 73.728MHz, and 98.304MHz
    • 336kB total memory
    • JTAG debug and trace
  • Low latency, 24-bit ADCs, and DAC
    • 106dB SNR (signal through ADC with A-weighted filter)
    • 110dB combined SNR (signal through DAC and headphones with A-weighted filter)
  • Programmable double precision MAC engine for a maximum 24-stage equalizer
  • Serial-port sample rates from 8kHz to 768kHz
  • 5μs group delay (fS = 768kHz) analog into analog out with FastDSP bypass (zero instructions)
  • 3x differential or single-ended analog inputs, configurable as a microphone or line inputs
  • 8x digital microphone inputs
  • Analog differential audio output, configurable as either line output or headphone driver
  • 2x PDM output channels
  • PLL supporting any input clock rate from 30kHz to 36MHz
  • 4-channel asynchronous sample rate converters (ASRCs)
  • 2x 16-channel serial audio ports supporting I2S, left-justified, right-justified, or up to TDM16 (TDM12 in turbo mode)
  • 8x interpolators and 8x decimators with flexible routing
  • Power supplies
    • Analog AVDD at 1.8V typical
    • Digital I/O IOVDD at 1.1V to 1.98V
    • Digital DVDD at 0.85V to 1.21V
    • Headphone HPVDD_L at 1.2 V to AVDD
  • Control/communication interfaces
    • I2C, SPI, or UART control ports
    • Main quad SPI (QSPI)
    • UART communication port
  • Self-boot from QSPI flash
  • Flexible GPIO and IRQ
  • 64-lead lead frame chip scale package [LFCSP], 9mm × 9mm and 0.85mm package height

Applications

  • Automotive audio systems
  • Digital audio effects processors

Block Diagram

Block Diagram - Analog Devices Inc. ADAU1861 Low Power Codec
發佈日期: 2023-03-27 | 更新日期: 2023-04-17