DK-DEV-5SGSMD5N

Altera
989-DK-DEV-5SGSMD5N
DK-DEV-5SGSMD5N

製造商:

說明:
可編程邏輯 IC 開發工具 FPGA Development Kit For 5SGSMD5K2

壽命週期:
壽命結束:
計劃停產且製造商將停止供貨。

庫存量: 2

庫存:
2 可立即送貨
工廠前置作業時間:
2 週 工廠預計生產時間數量大於所顯示的數量。
最少: 1   多個: 1
單價:
NT$-.--
總價:
NT$-.--
估計關稅:
此產品免費航運

Pricing (TWD)

數量 單價
總價
NT$237,812.32 NT$237,812.32

商品屬性 屬性值 選擇屬性
Altera
產品類型: 可編程邏輯 IC 開發工具
Development Kits
FPGA
5SGSMD5K2F40C2N
品牌: Altera
描述/功能: Stratix V development kit
接口類型: Ethernet, HSMC, JTAG, QSFP
工作電源電壓: 19 V
產品類型: Programmable Logic IC Development Tools
系列: Stratix V GS Development Kits
原廠包裝數量: 1
子類別: Development Tools
公司名稱: Stratix V FPGA
零件號別名: 979999
每件重量: 2.642 kg
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所選屬性: 0

                        
By clicking _Buy_ you agree: (1) you are a product or software
developer or system integrator and (2) the kit is for evaluation
only and not for resale.

Please contact a Mouser Technical Sales Representative for
further information.

5-0217-03

CNHTS:
8543709990
USHTS:
8473301180
TARIC:
8473302000
MXHTS:
8473300499
ECCN:
EAR99

DSP Development Kit, Stratix® V Edition

Altera DSP Development Kit, Stratix® V Edition, is a complete design environment with the hardware and software needed to develop Stratix V GS FPGA designs. The designer can test Altera's optimized variable-precision digital signal processing (DSP) block and develop DSP algorithms in a high-level model-based flow. They can test the signal quality of the FPGA transceiver I/Os (10 Gbps+) and develop and test PCI Express® (PCIe) 3.0 designs. The designer can develop and test memory subsystems consisting of SyncFlash, DDR3, and QDR™II+. This development kit allows for developing and testing SDI with the embedded 75ohm 3G SDI transceivers and developing embedded designs utilizing the Nios® II processor and external memory. A designer can develop and test network designs utilizing Triple Speed Ethernet MegaCore®, external RJ-45 jack, and optical networking designs using the 10Gbps and 40Gbps ethernet MAC MegaCores and the QSFP Optical Interface. Using the Clock Control GUI, a designer can also measure the FPGA's power consumption and control twelve different programmable clock oscillators.