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STGAP2SICS

Name: STMicroelectronics STGAP2SICS
Brand: STMicroelectronics
SKU: 511-STGAP2SICS
Price: 122.61 TWD
Availability: InStock

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Mouser 編號：

511-STGAP2SICS

製造商編號：

STGAP2SICS

製造商：

STMicroelectronics

說明：

電氣隔離式閘極驅動器 Galvanically isolated 4 A single gate driver for SiC MOSFETs

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規格書:

STGAP2SICS 規格書 (PDF)

ECAD模型:

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商品屬性	屬性值	選擇屬性
製造商:	STMicroelectronics
產品類型:	電氣隔離式閘極驅動器
RoHS:
系列:	STGAP2SICS
安裝風格:	SMD/SMT
封裝/外殼:	SO-8W
絕緣電壓:	5 kV
最低工作溫度:	- 40 C
最高工作溫度:	+ 125 C
傳輸延遲 - 最大值:	90 ns
上升時間:	30 ns
下降時間:	30 ns
封裝:	Tube
品牌:	STMicroelectronics
配置:	Non-Inverting
濕度敏感:	Yes
驅動器數:	1 Driver
輸出數:	1 Output
輸出電流:	4 A
產品:	Isolated Gate Drivers
產品類型:	Galvanically Isolated Gate Drivers
原廠包裝數量:	800
子類別:	PMIC - Power Management ICs
電源電壓 - 最大值:	5.5 V
電源電壓 - 最小值:	3 V
技術:	SiC
類型:	Half-Bridge
每件重量:	150 mg

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所選屬性: 0

篩選文檔:

規格書

STGAP2SICS 規格書 (PDF)

PCN

合規守則

CNHTS:: 8542399000
USHTS:: 8542390090
ECCN:: EAR99

原產地分類

原產國:: 中國台灣
封裝原產國:: 無資料
擴散國:: 無資料

出貨時，國家可能會有所變更。

STGAP2SiCD Galvanically Isolated Dual Gate Driver

STMicroelectronics STGAP2SiCD Galvanically Isolated 4A Dual Gate Driver is designed for galvanic isolation between each gate driving channel and the low voltage control and interface circuitry. The STGAP2SiCD gate driver is defined by 4A current capability and rail-to-rail outputs, ideal for mid and high power applications such as power conversion and industrial motor drivers inverters.

STGAP2SICS Single Gate Drivers

STMicroelectronics STGAP2SICS Single Gate Drivers provide galvanic isolation between the gate driving channel, low voltage control, and interface circuitry. The gate drivers are characterized by 4A capability and rail-to-rail outputs, making the devices suitable for mid and high-power applications such as power conversion and motor driver inverters in industrial applications. The device is available in two different configurations. The configuration with separated output pins (STGAP2SICSTR) allows users to optimize turn-on and turn-off using dedicated gate resistors independently. The configuration featuring a single output pin and Miller CLAMP function (STGAP2SICSCTR) prevents gate spikes during fast commutations in half-bridge topologies. Both configurations provide high flexibility and a bill of material reduction for external components.