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Microchip Technology MCP37x Pipelined ADCs

Microchip Technology MCP37x Pipelined ADCs feature a highly accurate signal-to-noise ratio (SNR) and a maximum sampling rate of 200Msps. These ADCs offer various Digital Signal Post-Processing (DSPP) options, including decimation filters for improved SNR and Fractional Delay Recovery (FDR) for time-delay corrections in multi-channel operations. Other DSPP options include phase, offset, and gain adjustment of individual channels, Digital Down-Conversion (DDC) with I/Q or fS/8 output, and continuous-wave beamforming for octal-channel mode. The MCP37x ADCs feature 500MHz input channel bandwidth and built-in ADC linearity calibration algorithms. These algorithms include Harmonic Distortion Correction (HDC), DAC Noise Cancellation (DNC), Dynamic Element Matching (DEM), and Flash error calibration. These Microchip Technology ADCs are ideal for use in communication instruments, microwave digital radio, lidar and radar, cellular base stations, and ultrasound and sonar imaging.

Features

  • Sample rates
    • 200Msps for single-channel mode
    • 200Msps/number of channels used
  • SNR with fIN=15MHz and -1dBFS: 74.7dBFS (typical) at 200Msps
  • SFDR with fIN=15MHz and -1dBFS: 90dBc (typical) at 200Msps
  • 490mW at 200Msps power dissipation with LVDS digital I/O
  • 436mW at 200Msps (output clock=100MHz) power dissipation with CMOS digital I/O
  • 390mW at 200Msps power dissipation excluding digital I/O
  • Power saving modes
    • 144mW during standby
    • 28mW during shutdown
  • Supply voltage
    • 1.2V and 1.8V digital section
    • 1.2V and 1.8V analog section
  • Up to 2.975VP-P selectable full-scale input range
  • 500MHz input channel bandwidth
  • >95dB channel-to-channel crosstalk in multi-channel mode
  • Output data format
    • Parallel CMOS and DDR LVDS
    • Serialized DDR LVDS (16-bit, octal-channel mode)
  • Optional output data randomizer
  • Built-in ADC linearity calibration algorithms
    • Harmonic Distortion Correction (HDC)
    • DAC Noise Cancellation (DNC)
    • Dynamic Element Matching (DEM)
    • Flash error calibration
  • Digital Signal Post-Processing (DSPP) options
    • Decimation filters for improved SNR
    • Fractional Delay Recovery (FDR) for time-delay corrections in multi-channel operations
    • Phase, offset, and gain adjust of individual channels
    • Digital Down-Conversion (DDC) with I/Q or fS/8 output
    • Continuous-wave beamforming for octal-channel mode
  • Serial Peripheral Interface (SPI)
  • Auto-sync mode to synchronize multiple devices to the same clock
  • AEC-Q100 qualified

Applications

  • Communication instruments
  • Microwave digital radio
  • Lidar and radar
  • Cellular base stations
  • Ultrasound and sonar imaging

Block Diagram

Block Diagram - Microchip Technology MCP37x Pipelined ADCs
發佈日期: 2020-01-23 | 更新日期: 2024-07-09