NewAE Technology Artix FPGA Target Board (CW305)

NewAE Technology Artix FPGA Target Board (CW305) enables embedded security analysis testing on the Xilinx Artix-7 FPGA (Field Programmable Gate Array) devices. The Artix FPGA Target Board is an advanced target for performing power analysis and fault injection attacks against hardware cryptographic functions implemented in FPGAs. This board is designed to interface to hardware such as the ChipWhisperer Pro (CW1200) or the ChipWhisperer-Lite (CW1173) Capture Tools.

The NewAE Technology Artix FPGA Target Board features a custom USB interface chip, allowing developers to send and receive data to the FPGA design while performing FPGA configuration and adjusting external PLL operating frequencies. ESD protection on all I/O lines to ensure safe glitch insertion. The Artix FPGA Target Board is available with either an XC7A35T or XC7A100T target, allowing the user to test Physically Unclonable Functions (PUFs) under the exact same environmental conditions across different devices.

Features

Shunt resistor for measurement of power consumption of core implemented on FPGA
The default option of no decoupling capacitors mounted leaves high-frequency signals present across the shunt
ESD protection reduces the possibility of resetting the USB interface when inserting EM or voltage faults

Programmable VCC-INT power supply
Custom USB interface provides a simple address/data register set, allowing designers to concentrate on the FPGA core and not on the details of the USB Interface protocol
External oscillators enable control of external parameters over USB for validation across voltage and frequency

Specifications

FPGA supported: Xilinx Artix-7 FPGA in an FTG256 package
FPGA configuration support: USB (built-in), JTAG (requires external tool), SPI Flash memory
Power supplies:
- VCC-INT (Programmable): 0.8V to 1.2V, 4A
- VCC-AUX (Fixed) 1.8V, 1.5A
- VCC-IO (Fixed) 3.3V, 2A, Fixed
USB interface: Custom high-speed USB 2.0 firmware running on Arm® microcontroller
USB functions: FPGA configuration, VCC-INT setting, PLL configuration, writing onto data-bus for FPGA
USB example languages: Python (Linux, Windows, Mac OS-X)

USB-supported language: Any that can access libusb DLL (C, C++, VB, etc.)
Supported toolchains: Xilinx Vivado (All FPGAs), Xilinx ISE (XC7A100T only)
PLL channels: 3 separate frequencies
PLL output range: 1MHz to 200MHz
I/O on expansion header: 27 GPIO (including 2x differential and 3 clock inputs on FPGA)
I/O on 20-pin header: 11 GPIO (including 1 clock input on FPGA)
I/O on SMA connectors: 2 GPIO (including 1 clock input on FPGA)