Renesas Electronics 9ZXL0651E/52E Clock Buffers

Renesas Electronics 9ZXL0651E/52E Clock Buffers are the second-generation DB800ZL differential buffers with enhanced performance. The 9ZXL0651E/52E buffers are pin-compatible upgrades to the 9ZXL0651A/52A clock buffers while offering a much-improved phase jitter performance. These 9ZXL0651E/52E clock buffers offer fixed external feedback, which maintains low drift for critical QPI/UPI applications. The 9ZXL0652E clock buffers include an SMBus write lockout pin for increased device and system security. Typical applications include servers, storage, JBOD, and networking.

Features

  • 9ZXL0652E SMBus write lock feature increases system security
  • Hardware control of each output is by 6 OE# pins
  • Hardware/SMBus control of PLL bandwidth and bypass changes mode without a power cycle
  • Spread spectrum compatible tracks spreading input clock for EMI reduction
  • Small board footprint 5mm x 5mm 40-QFN package
  • PCIe clocking architectures supported
    • Common Clocked (CC)
    • Independent Reference (IR) with and without spread spectrum
  • Output: 6 Low-Power HCSL (LP-HCSL) output pairs with 85Ω Zout

Specifications

  • Less than 50ps cycle-to-cycle jitter 
  • Less than 50ps output-to-output skew
  • Input-to-output delay fixed at 0ps
  • Less than 50pcs input-to-output delay variation
  • Less than 0.5ps rms phase jitter PCIe Gen4
  • Phase jitter QPI/UPI > = 9.6GB/s < 0.2ps rms
  • Less than 1.0ps rms phase jitter IF-UPI

Applications

  • Servers
  • Storage
  • JBOD
  • Networking

Block Diagram

Block Diagram - Renesas Electronics 9ZXL0651E/52E Clock Buffers
發佈日期: 2018-07-06 | 更新日期: 2023-01-25