Texas Instruments CD74HC137/CD74HCT137 3-to-8 Line Decoder Demux

Texas Instruments CD74HC137/CD74HCT137 3-to-8 Line Decoder Demultiplexers are high-speed silicon-gate CMOS decoders well suited to data routing or memory address decoding applications. Both circuits have speeds comparable to low-power Schottky TTL logic and feature low power consumption, which is usually associated with CMOS circuitry. These devices are available in PDIP-16, TSSOP-16, SOIC-16, and SOP-16 packages.

These circuits have three binary select inputs (A0, A1, and A2) that can be latched by an active High Latch Enable (LE) signal. This is done to isolate the outputs from select-input changes. A "Low" LE makes the output transparent to the input, and the circuit functions as a one-of-eight decoder. Two Output Enable inputs (OE\1 and OE0) are provided to facilitate demultiplexing and to simplify cascading. The demultiplexing function uses the A0, A1, and A2 inputs to select the desired output. It holds one Output Enable input in its active state and the other Output Enable input as the data input. In the Texas Instruments CD74HC137 and CD74HCT137, the selected output is a "Low"; in the CD74HCT237, the selected output is a "High".

Features

Select one of eight data outputs
- Active low for CD74HC137 and CD74HCT137
- Active high for CD74HCT237
I/O port or memory selector
Two enable inputs to simplify cascading
Typical propagation delay of 13ns at V_CC = 5V, 15pF, T_A = 25°C (CD74HC237)
Fanout (over temperature range)
- Standard outputs: 10 LSTTL loads
- Bus driver outputs: 15 LSTTL loads
Wide operating temperature range of –55°C to 125°C

Balanced propagation delay and transition times
Significant power reduction compared to LSTTL logic ICs
HC types
- 2V to 6V operation
- High noise immunity: N_IL = 30%, N_IH = 30%, of V_CC at V_CC = 5V
HCT types
- 4.5V to 5.5V operation
- Direct LSTTL input logic compatibility, V_IL = 0.8V (max.), V_IH = 2V (min.)
CMOS input compatibility, I_l 1µA at V_OL, V_OH