Texas Instruments CDCM9102 Two Channel 100MHz Clock Generator
Texas Instruments CDCM9102 Low Noise Two Channel 100MHz Clock Generator is designed to provide reference clocks for communications standards such as PCI Express™. CDCM9102 is easy to configure and use. This Texas Instruments clock generator provides two 100MHz differential clock ports. The output types supported for these ports include LVPECL, LVDS, or a pair of LVCMOS buffers. HCSL signaling is supported using an AC-coupled network. The user configures the output buffer type desired by strapping device pins. A single-ended 25MHz clock output port is also provided. Uses for this port include general-purpose clocking, clocking Ethernet PHYs, or providing a reference clock for additional clock generators. All clocks generated are derived from a single external 25MHz crystal.
Features
- Integrated Low-Noise Clock Generator Including PLL, VCO, and Loop Filter
- Two Low-Noise 100MHz Clocks (LVPECL, LVDS, or pair of LVCMOS)
- Support for HCSL Signaling Levels (AC-Coupled)
- Typical Period Jitter: 21ps pk-pk
- Typical Random Jitter: 510fs
- Output Type Set by Pins
- Bonus Single-ended 25MHz Output
- Integrated Crystal Oscillator Input Accepts 25MHz Crystal
Applications
- Reference Clock Generation for PCI Express Gen 1, Gen 2, and Gen 3
- General-Purpose Clocking
Block Diagram
Typical Application Example
發佈日期: 2012-04-23
| 更新日期: 2020-12-18