Texas Instruments DP83867IR/DP83867CR Ethernet PHY Transceivers

Texas Instruments DP83867IR/DP83867CR Ethernet PHY Transceivers are robust, low-power, fully featured Physical Layer (PHY) transceivers with integrated PMD sublayers to support 1000BASE-T, 10BASE-Te, and 100BASE-TX Ethernet protocols. The DP83867IR/DP83867CR exceeds 8kV IEC 61000-4-2 (direct contact) and is optimized for ESD protection.

The DP83867IR/DP83867CR is designed to implement 10/100/1000Mbps Ethernet LANs easily. It interfaces directly to twisted pair media via an external transformer and directly to the MAC layer through the IEEE 802.3 Gigabit Media Independent Interface (GMII), the IEEE 802.3 Standard Media Independent Interface (MII), or Reduced GMII (RGMII). The QFP package supports GMII/MII/RGMII, whereas the QFN package supports RGMII.

The Texas Instruments DP83867IR/DP83867CR synchronizes precision clocks, including a synchronous Ethernet clock output. It provides IEEE 1588 Start of Frame Detection and has low latency. Under full operating power, the DP83867IR/DP83867CR consumes only 490mW (PAP) and 457mW (RGZ). Wake on LAN can be used to lower system power consumption.

Features

  • Ultra-low RGMII latency TX of < 90ns, RX < 290ns
  • Time Sensitive Network (TSN) compliant
  • Low power consumption of 457mW
  • Exceeds 8000V IEC 61000-4-2 ESD protection
  • Meets EN55011 class B emission standards
  • 16 programmable RGMII delay modes on RX/TX
  • Integrated MDI termination resistors
  • Programmable MII/GMII/RGMII termination impedance
  • WoL (Wake-on-LAN) packet detection
  • 25MHz or 125MHz synchronized clock output
  • Start of Frame Detect for IEEE 1588 timestamp
  • RJ45 mirror mode
  • Fully compatible to IEEE 802.3 10BASE-Te, 100BASE-TX, and 1000BASE-T Specification
  • Cable diagnostics
  • MII, GMII, and RGMII MAC interface options
  • Configurable I/O voltage (3.3V, 2.5V, 1.8V)
  • Fast link drop mode
  • JTAG support

Applications

  • Motor drives
  • Industrial factory automation
  • Field Bus support
  • Industrial embedded computing
  • Wired and wireless communications infrastructure
  • Test and measurement
  • Consumer electronics

Videos

Functional Block Diagrams

Block Diagram - Texas Instruments DP83867IR/DP83867CR Ethernet PHY Transceivers
Block Diagram - Texas Instruments DP83867IR/DP83867CR Ethernet PHY Transceivers
發佈日期: 2024-10-30 | 更新日期: 2025-09-15