CrossLink-NX FPGA - Field Programmable Gate Array

Results: 57
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Description Datasheet Availability Pricing (TWD) Filter the results in the table by unit price based on your quantity.
Qty. RoHS ECAD Model Series
Number of Logic Elements
Adaptive Logic Modules - ALMs
Embedded Memory
Number of I/Os
Supply Voltage - Min
Supply Voltage - Max
Minimum Operating Temperature
Maximum Operating Temperature
Data Rate
Number of Transceivers
Mounting Style
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Qualification
Packaging
Lattice FPGA - Field Programmable Gate Array Lattice CrossLink -NX Embedded Vision Bridging & Processing FPGA with 2.5G MIPI D-PHY
Datasheet
Non-Stocked Lead-Time 40 Weeks
Min.: 240
Mult.: 240

LIFCL-40 39000 LE 0 bit 180 I/O 1 V 1 V - 40 C + 100 C 2.5 Gb/s, 10 Gb/s 2 Transceiver SMD/SMT CSBGA-289 Tray
Lattice FPGA - Field Programmable Gate Array Lattice CrossLink -NX Embedded Vision Bridging & Processing FPGA with 2.5G MIPI D-PHY
Datasheet
Non-Stocked
Min.: 168
Mult.: 168

LIFCL-40 39000 LE 0 bit 40 I/O 1 V 1 V 0 C + 85 C SMD/SMT QFN-72 Tray
Lattice FPGA - Field Programmable Gate Array Lattice CrossLink -NX Embedded Vision Bridging & Processing FPGA with 2.5G MIPI D-PHY
Datasheet
Non-Stocked
Min.: 168
Mult.: 168

LIFCL-40 39000 LE 0 bit 40 I/O 1 V 1 V - 40 C + 100 C SMD/SMT QFN-72 Tray
Lattice FPGA - Field Programmable Gate Array Lattice CrossLink -NX Auto Grade (AEC-Q100) Embedded Vision Bridging & Processing FPGA with 2.5G MIPI D-PHY
Datasheet
Non-Stocked Lead-Time 40 Weeks
Min.: 119
Mult.: 119

LIFCL-17 17000 LE 432 kbit 77 I/O 1 V 1 V 2.5 Gb/s, 10 Gb/s 8 Transceiver SMD/SMT caBGA-256 AEC-Q100 Tray
Lattice FPGA - Field Programmable Gate Array Lattice CrossLink -NX Auto Grade (AEC-Q100) Embedded Vision Bridging & Processing FPGA with 2.5G MIPI D-PHY
Datasheet
Non-Stocked Lead-Time 40 Weeks
Min.: 1
Mult.: 1

LIFCL-17 17000 LE 432 kbit 71 I/O 1 V 1 V 2.5 Gb/s, 10 Gb/s 8 Transceiver SMD/SMT csfBGA-121 AEC-Q100 Tray
Lattice FPGA - Field Programmable Gate Array Lattice CrossLink -NX Auto Grade (AEC-Q100) Embedded Vision Bridging & Processing FPGA with 2.5G MIPI D-PHY
Datasheet
Non-Stocked Lead-Time 40 Weeks
Min.: 490
Mult.: 490

LIFCL-40 39000 LE 1.48 Mbit 71 I/O 1 V 1 V 2.5 Gb/s, 10 Gb/s 8 Transceiver SMD/SMT csfBGA-121 AEC-Q100 Tray
Lattice LIFCL-17-7UWG72C
Lattice FPGA - Field Programmable Gate Array Lattice CrossLink -NX Embedded Vision Bridging & Processing FPGA with 2.5G MIPI D-PHY
Datasheet
Non-Stocked Lead-Time 40 Weeks
Min.: 4,000
Mult.: 4,000
: 4,000

LIFCL-17 17000 LE 0 bit 192 I/O 1 V 1 V 0 C + 85 C WLCSP-72 Reel